Recently in the field of a radio communication system, a system in which a radio base station equipment is divided into a apparatus for processing a baseband signal and a apparatus for modulating, demodulating and amplifying a radio signal, and these apparatuses are connected through an optical cable has been standardized. The system corresponds to the Common Public Interface (CPRI) Standard, the Open Base Station Standard Initiative (OBSAI) Standard, etc.
In addition, in order to increase data traffic with a recent drastic increasing demand for radio communications, each communication common carrier is shifting to a communication system in which a communication method having higher frequency efficiency is used. For example, a communication method is changed from Wideband Code Division Multiple Access (WCDMA) to Long Term Evolution (LTE), etc. Thus, when a radio communication system is shifted to a new radio communication system in which a different communication method is used, the existing radio communication system and the new radio communication system transitionally coexist.
FIG. 1 is the configuration in which a plurality of radio communication systems coexist in the prior art. In FIG. 1, for example, a radio communication system 1A corresponds to an existing radio communication system, and a radio communication system 1B corresponds to a new radio communication system. In FIG. 1, the above-mentioned apparatus for processing the baseband signal corresponds to radio apparatus controllers 11A and 11B such as Radio Equipment Control (REC). The above-mentioned apparatus for modulating, demodulating and amplifying a radio signal corresponds to radio apparatuses 12A-1 through 12A-3 and 12B-1 through 12B-3 such as Radio Equipment (RE).
In FIG. 1, the radio apparatus controller 11A or 11B is included in each radio communication system. However, each radio communication system can be provided with a plurality of radio apparatus controllers.
In addition, in FIG. 1, the radio apparatus controllers 11A and 11B are connected to the three radio apparatuses 12A-1 through 12A-3 and 12B-1 through 12B-3, respectively. However, the number of radio apparatuses connected to each of the radio apparatus controllers 11A and 11B is not limited to three.
The radio apparatus controller 11A stably generates a correct reference clock using an absolute time of a global positioning system (GPS) signal etc. received by a reference clock receiver 13A. The radio apparatus controller 11A operates in synchronization with the generated reference clock. Then, the radio apparatus controller 11A superposes a clock component for synchronization on a downlink signal to the radio apparatuses 12A-1 through 12A-3, and transmits the result signal to the radio apparatuses 12A-1 through 12A-3 through optical cables 14A-1 through 14-3.
The radio apparatuses 12A-1 through 12A-3 extract the clock component superposed on the downlink signal received from the radio apparatus controller 11A from the downlink signal, thereby generating a recovery clock. Then, the radio apparatuses 12A-1 through 12A-3 operate in synchronization with the generated recovery clock. Thus, the radio apparatuses 12A-1 through 12A-3 can attain frequency synchronization with the radio apparatus controller 11A.
On the other hand, the radio apparatus controller 11B stably generates a correct reference clock using an absolute time of a GPS signal etc. received by a reference clock receiver 13B. The radio apparatus controller 11B operates in synchronization with the generated reference clock. Then, the radio apparatus controller 11B superposes a clock component for synchronization on a downlink signal to the radio apparatuses 12B-1 through 12B-3, and transmits the result signal to the radio apparatuses 14B-1 through 14B-3 through optical cables.
The radio apparatuses 12B-1 through 12B-3 extract the clock component superposed on the downlink signal received from the radio apparatus controller 11B from the downlink signal, thereby generating a recovery clock. Then, the radio apparatuses 12B-1 through 12B-3 generate an operation clock in synchronization with the generated recovery clock. Thus, the radio apparatuses 12A-1 through 12A-3 can attain frequency synchronization with the radio apparatus controller 11B.
As illustrated in FIG. 1, in the conventional configuration in which a plurality of radio communication systems coexist, the facility investment for the radio apparatus, the radio apparatus controller, etc. on a new radio communication system is newly performed.
However, as indicated by the above example of changing a communication method from the WCDMA to the LTE, when a change is made to a new radio communication system using the same frequency band as the existing radio communication system, it is hard to devise a confliction with the existing antenna facility because it is necessary to consider the isolation of the transmission power between antennas etc. Furthermore, separately providing radio apparatuses including the antennas having the same frequency band for the existing radio communication system and a new radio communication system is not advantageous in facility cost and in securing the installation location.
In addition, a large number of radio apparatus controllers can be installed in one radio communication system. Therefore, further providing a reference clock receiver having the same function not only for a radio apparatus controller of an existing radio communication system but also for a radio apparatus controller of a new radio communication system is not advantageous in facility cost. In addition, since it is necessary for the reference clock receiver to be provided in a position where radio waves can be received, it is necessary to check the applicability of the installation location.
Therefore, it is requested to share a radio apparatus including an antenna facility among a plurality of radio communication systems, and provide for one of the plurality of radio communication systems a reference clock receiver to receive a GPS signal etc. for use in stably generating a correct reference clock.
FIG. 2 illustrates the configuration in which there are a plurality of radio communication systems in which a radio apparatus is shared among a plurality of radio communication systems and a reference clock receiver is provided for one of the plurality of radio communication systems.
In FIG. 2, radio apparatuses 22C-1 through 22C-3 including antenna facilities are shared by radio communication systems 2A and 2B. That is, in FIG. 2, a radio apparatus controller 21A and radio apparatuses 22C-1 through 22C-3 in the radio communication system 2A are connected through optical cables 24A-1 through 24A-3, respectively. In addition, a radio apparatus controller 21B and the radio apparatuses 22C-1 through 22C-3 in the radio communication system 2B are connected through optical cables 24B-1 through 24B-3, respectively.
In addition, a reference clock receiver 23A is provided for the radio apparatus controller 21A, and no reference clock receiver is provided for the radio apparatus controller 21B.
In the configuration in which a plurality of radio communication systems coexist as illustrated in FIG. 2, the installation cost for radio apparatus, a reference clock receiver, etc. can be reduced. Furthermore, the problem with the analog characteristics such as the guarantee of the isolation between antennas etc. can be solved.
However, in the configuration in which the plurality of radio communication systems coexist as illustrated in FIG. 2, no reference clock receiver is installed for radio apparatus controller 21B. Therefore, the radio apparatus controller 21B operates in synchronization with the built-in clock generated from the oscillator provided in the radio apparatus controller 21B. Accordingly, the operation clock of the radio apparatus controller 21A and the operation clock of the radio apparatus controller 21B can enter the asynchronous state. As a result, there occurs a time difference in clock frequency between the downlink signal from the radio apparatus controller 21A to the radio apparatuses 22C-1 through 22C-3 and the downlink signal from the radio apparatus controller 21B to the radio apparatuses 22C-1 through 22C-3.
FIG. 3 is an explanatory view of an occurrence of an error caused by frequency asynchronous in the data transfer.
For example, it is assumed that the radio apparatuses 22C-1 through 22C-3 illustrated in FIG. 2 operate in synchronization with the clock component included in the downlink signal received from the radio apparatus controller 21A provided with the reference clock receiver 23A. In this case, it is assumed that the radio apparatuses 22C-1 through 22C-3 have received the downlink signal in which a time difference from the downlink signal from the radio apparatus controller 21A has occurred in the clock frequency, from the radio apparatus controller 21B. Then, it is also assumed that the radio apparatuses 22C-1 through 22C-3 have sampled the downlink signal received from the radio apparatus controller 21B in synchronization with the clock component included in the downlink signal received from the radio apparatus controller 21A.
In the case in which the above-mentioned assumptions have been made, the received data illustrated in FIG. 3 corresponds to the data of the downlink signal received from the radio apparatus controller 21B. In addition, the sampling period expressed by the interval indicated by the arrows in FIG. 3 corresponds to the sampling period in synchronization with the clock component included in the downlink signal received from the radio apparatus controller 21A.
As illustrated in FIG. 3, if there occurs a time difference between the bit rate of the received data and the sampling speed of the radio apparatus, an error in data transfer such as a FIFO (first in first out) empty or a FIFO overflow may be caused although a clock transfer is performed using the FIFO so that a data loss does not occur.
The occurrence of a data transfer error may cause line quality degradation. Furthermore, since it is necessary to retransmit erroneous data from the radio apparatus controller 21B to the radio apparatus 22C-1 through 22C-3, it causes the degradation of throughput in the entire system.
Furthermore, in order to suppress the occurrence of an error in data transfer as described above, it is necessary for the radio apparatuses 22C-1 through 22C-3 to multiplex the downlink signal received from the radio apparatus controller 21A and the downlink signal received from the radio apparatus controller 21B by considering the time difference in clock frequency between the downlink signals.
FIG. 4 is an example of the conventional circuit configuration of a radio apparatus when the frequency synchronization is not attained between the downlink signals received from a plurality of radio apparatus controllers.
In the radio apparatus 4 in FIG. 4, a downlink signal A is a downlink signal received from the radio apparatus controller operating in synchronization with the reference clock generated by using an absolute time of a GPS signal etc. A downlink signal B is a downlink signal received from the radio apparatus controller operating in synchronization with a built-in clock in the radio apparatus controller.
In the radio apparatus 4 illustrated in FIG. 4, the downlink signal A is converted from an optical signal to an electric signal by a photoelectric conversion unit 401A. Furthermore, the downlink signal B is converted from an optical signal to an electric signal by a photoelectric conversion unit 401B.
The radio apparatus 4 performs the following process before multiplexing a data signal A extracted from the downlink signal A converted into the electric signal and a data signal B extracted from the downlink signal B converted into the electric signal.
A synchronous clock generation unit 402A generates a recovery clock A from the downlink signal A. In addition, a downlink signal processing unit 403A extracts the data signal A from the downlink signal A.
On the other hand, asynchronous clock generation unit 402B generates a recovery clock B from the downlink signal B. Furthermore, the downlink signal processing unit 403B extracts the data signal B from the downlink signal B.
The extracted data signal B is modulated by a modulation unit 405B according to the recovery clock B. Then, the modulated data signal B is resampled by a processing speed conversion unit 406 according to the recovery clock A to attain synchronization with the data signal A.
That is, in the processing speed conversion unit 406, the modulated data signal B is converted into an analog signal by a digital/analog conversion unit 406-1, and then resampled according to the recovery clock A. Then, the resampled data signal B is converted into a data signal by an analog/digital conversion unit 406-2.
After the conversion through the processing speed conversion unit 406, the data signal B is remodulated by a modulation unit 407B according to the clock signal A.
On the other hand, the data signal A extracted by the downlink signal processing unit 403A is phase-adjusted with the data signal B by a delay adjustment unit 404.
As described above, it is necessary to process the data signal B by the processing speed conversion unit 406 to attain synchronization with the data signal A. Therefore, the delay adjustment unit 404 performs the phase adjustment on the data signal A in accordance with the time required to perform the process on the data signal B by the processing speed conversion unit 406.
The phase-adjusted data signal A is modulated by a modulation unit 405A.
After the above-mentioned process, the data signals A and B are multiplexed by a signal multiplexing unit 408. Then, the multiplexed data signals A and B are improved the distortion characteristics to be occurred by an amplification unit 410 by peak suppression and distortion compensation unit 409, and then amplified into transmission power by the amplification unit 410.
As described above, when there is a time difference in clock frequency between the downlink signals received from a plurality of radio apparatus controllers, it is necessary to provide in the radio apparatus a processing speed conversion unit for attaining synchronization, thereby increasing the circuit size of the radio apparatus. In addition, since the resampling of a data signal by the processing speed conversion unit generates a quantization error of baseband data, the communication quality is degraded. Furthermore, since it is necessary for the radio apparatus to perform processes according to a plurality of clocks, the clock system of the radio apparatus becomes complicated.
As the prior art relating to the subordinate synchronization in an integrated services digital network (IDSN), the following technique is disclosed. That is, clock components are extracted from the received signals of a plurality of basic interfaces and a primary group speed interface to generate a frame pulse, and a net subordinate clock synchronous with a frame pulse corresponding to a normal ISDN line in the generated frame pulses is generated.    Patent Document 1: Japanese Laid-open Patent Publication No. 5-316251    Non-patent Document 1: “CPRI Specification v4.2(2010-09-29)”, [online], [retrieved on Mar. 16, 2011], Internet <URL: http://www.cpri.info/downloads/CPRI_v—4—2—2010-09-29.pdf>